1. Field of the Invention
The present invention relates to the fabrication of integrated circuits. More specifically, the present invention relates to a method of producing fine geometry hardmasks with a controlled profile and height to enable the fabrication of precise subresolution features for integrated circuits and other structures.
2. State of the Art
In fabrication of semiconductor devices including integrated circuitry, such as memory dice, conventional photolithography limits the ability to produce very fine structural features. Currently, photolithography is only capable of producing structural features of about 100 nm in minimum dimension. This inadequacy limits the ability of a manufacturer to produce extremely small structural features for integrated circuits through conventional photolithography processes. A capability to further reduce the dimensions of structural feature size is particularly important to the fabrication of semiconductor memory devices to enable increasing the number of memory cells on such semiconductor memory devices of a given size.
U.S. Pat. No. 6,514,849 to Hui et al., U.S. Pat. No. 6,537,866 to Shields et al., U.S. Pat. No. 6,455,433 to Chang et al., U.S. Pat. No. 6,110,837 to Linliu et al., U.S. Pat. No. 5,916,821 to Kerber, U.S. Pat. No. 5,776,836 to Sandhu, and U.S. Pat. No. 5,296,410 to Yang attempt to overcome some of the problems associated with conventional photolithography.
An alternative to using conventional photolithography is a technique called “loose photo patterning.” Generally described, loose photo patterning allows creating smaller mask features than would be possible with conventional photolithography. In loose photo patterning, mask features of conventional size are formed using conventional photolithography and dry etching, followed by coating such features with a layer of material. The layer of material is then removed from the top of the mask feature and the mask feature is subsequently etched away. The side coatings can be used as a hardmask to form so-called “subresolution” structural features, indicating that such structural features are of smaller dimensions than are achievable by using photolithography to form them directly. In other words, such features are smaller than the finest resolution photolithography processes can produce. Furthermore, all subresolution features will be the thickness of the coating used to coat the standard mask feature. Loose photo patterning allows creating mask features as small as 10 nm, which would not be possible with conventional photolithography.
A method of forming features using conventional loose photo patterning will be better understood with reference to FIGS. 1A-1D. FIG. 1A shows portion 100 of substrate 2, such as p or n type silicon or other semiconductor substrate material, including a first layer 4 deposited on substrate 2. First layer 4 is typically a silicon nitride layer approximately 900 Å in thickness. First layer 4 is formed into a selected geometry, as shown in FIG. 1A, using conventional photolithography and anisotropic etch processing. Referring to FIG. 1B, a hardmask layer 6 of, for example, 300 Å thick tetraethyloxysilicate (TEOS) silicon dioxide is deposited on first layer 4. As shown in FIG. 1C, hardmask layer 6 is anisotropically etched to leave only the portion of hardmask layer 6 covering the sidewalls of first layer 4. First layer 4 is then completely removed from substrate 2 by a dry or wet etch to form the sidewall spacer hardmask shown in FIG. 1D usable for further etching of substrate 2 to define selected structural feature patterns therein.
While conventional loose photo patterning allows for forming fine geometry hardmask features, it also results in a phenomenon known as “sputtering.” As shown in FIG. 1D, sputtering occurs when hardmask layer 6 exhibits an asymmetric profile, which results in a poorly defined profile in the etched features of underlying substrate 2. These asymmetries of hardmask layer 6 produce different etch rates adjacent the inner and outer edges of hardmask layer 6 when the underlying substrate 2 is etched. As the aspect (height or depth to width) ratios of etched features in substrate 2 increase, the phenomenon of sputtering is aggravated and it becomes more important for the profile of hardmask layer 6 to be symmetric and, preferably, rectangular.
Therefore, due to the limits of conventional photolithography and loose photo patterning it is desirable to develop a method which results in hardmask elements with an accurately controlled profile and height, enabling the semiconductor device fabricator to achieve an accurately etched profile in a substrate underlying the hardmask.